(Paper) ISRO Exam Paper of Computer Science Held on : 26th April, 2009

ISRO 26th April 2009 Computer Science Placement Paper

1. A full binary tree with n leaves contains?(2N-1)

2. The expression 1*2^3*4^5*6 will be evaluated as?

3. The feature in object oriented programming that follows he same operation to be carried out differently ,depending on the object, is?

4. The microistructions stored in the control mamory of a processor have a width of 26 bits. Each microinstructionsion. is divided into three fields: a microoperation field of 13 bits, a next address field(x), and a MUX select field(y).There are 8 status bits in the inputs of the MUX. How many bits are there in the X and Y fields, and what is the size of the control memory in number of words?

5. A cpu has 24-bit instructions. A program starts at address 300(in decimal).Which one of the following is a legal program counter (all values in decimal)?

6. Consider a disk pack with 16 surfaces,128 tracks per surface and 256 sectors per track.512 bytes of data are stores in a bit serial manner in a sector.The capacity of the disk and the number of bits required to specify a particular in the disk are respectively.

7. Consider a pipelined processor with the following four stages
Instruction Fetch
ID:Instruction Decode and Operand Fetch EX:Execute WB:Write Back
The IF,ID and WB stages take one clock cycle each to complete the operation.The ADD and SUB instructions need 1 clock cycle and the MUL instruction need 3 clock cycles in the EX stage.Operand forwarding is used in the pipelined processor.What is y the number of clock cycles taken to complete the following sequence of instructions?

ADD R2,R1,R0 R2 R1+R0
MUL R4,R3,R2 R4 R3+R2
SUB R6,R5,R4 R6 R5+R4

8. The use of multiple register windows with overlap causes a reduction in the number of memory accesses for:-
Function locals and parameters
    2.Registers saves and restores
    3.Instruction fetches

9. A processor that has carry, overflow and sign flag bits as part of its program status word(PSW) performs addition of the following two 2’s complement numbers 0100101 and 11101001.After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be

10. The two numbers given below are multiplied using the Booth’s algorithm.
    Multiplicand:0101 1010 1110 1110 Multiplier:0111 0111 1011 1101 How many additions/Subtractions are required for the multiplication of the above two numbers?

11. The addition of 4-bit, two’s complement,binary numbers 1101 and 0100 results in

12. Which of the following statements about relative addressing mode is FALSE?
It enables reduced instruction size
    2.It allows indexing of array element with same instruction
    3.It enables easy relocation of data
    4.It enables f asters address calculation than absolute addressing

13. Substitution of values for names(whose values are constants) is done?

14. A root alpha (symbol) of equation f(x) =0 can be computed to any degree of accuracy if a ‘good’ initial approximation x0 is chosen for which?

15. Which of the following statement is correct? Ans.delta(Uk Vk)=Uk+1 delta Vk+Vk+1 delta Uk